1. Field of the Invention
This invention relates to a solid state imaging device such as a CCD imager, and more particularly to a solid state imaging device from which both normal image signals and mirror image signals can be selectively obtained.
2. Description of the Prior Art
There are two known methods of obtaining mirror image signals from a two-dimensional solid-state imaging device by purely electronic processing:
(1) by providing one additional line memory and reversing the sequence of image signals for one horizontal scanning line in the additional line memory; and
(2) by reversing the direction of the horizontal scanning in the solid state imaging device when reading out image signals.
Among these two methods, method (1) is not advantageous because it involves an increase in the size of the circuitry around the imaging device and tends to cause problems such as degradation of the S/N ratio, etc.
The following description deals with method (2), taking for example a CCD imager which is the most commonly used solid state imaging device. In the following discussion, an interline transfer CCD imager is taken for example, but it should be appreciated that the discussion is also applicable to a frame transfer CCD imager in exactly the same way. FIG. 4 shows an interline transfer CCD imager in which the method (2) is employed. The interline transfer CCD imager of FIG. 4 comprises: photoelectric converting elements (pixels) a.sub.ij arranged in a 4.times.4 matrix; a vertical CCD array 41 which transfers signals received from the pixels a.sub.ij, in the vertical direction in accordance with vertical clock signals .phi..sub.V1, .phi..sub.V2, .phi..sub.V3 and .phi..sub.V4 ; a horizontal CCD array 42 which transfers signals received from the vertical CCD array 41, in the horizontal direction according to horizontal clock signals .phi..sub.H1, .phi..sub.H1 ', .phi..sub.H2 and .phi..sub.H2 '; a first signal charge detector A1 disposed at the left end of the horizontal CCD array 42; and a second signal charge detector A2 disposed at the right end of the horizontal CCD array 42. In this configuration, when the timing of the horizontal clock signals .phi. .sub.H1 -.phi..sub.H2 ' is set to a first driving mode to provide right-to-left transfer directionality to the horizontal CCD array 42, an output signal OS is obtained from the first signal charge detector A1 to form normal image signals. In contrast, when the timing of the horizontal clock signals .phi..sub.H1 -.phi..sub.H2 ' is set to a second driving mode (in which the phase is shifted by 180.degree. with respect to that in the first driving mode) to provide left-to-right transfer directionality to the horizontal CCD array 42, an output signal OS' is obtained from the second signal charge detector A2 to form mirror image signals. Such a solid state imaging device is disclosed, for example, in Japanese Patent Publication (Kokai) No. 1-302974.
The above-described configuration has the following drawbacks.
(A) Because of a difference in characteristics between the signal charge detectors A1 and A2, there occurs a variation in the picture quality between the resulting normal and mirror images.
(B) It requires the provision of two separate output circuits which makes the configuration of an external signal processing system complex.
(C) Since two sets of output circuits are required, the number of output terminals is twice as many as compared with a conventional CCD imager.
(D) In order to reduce the power consumption it is necessary to provide an external power switching circuit or the like.